第二十七课——RISC-V CPU总线外设-UART
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bilibili成工FPGA
第二十七课——RISC-V CPU总线外设-UART
使用FPGA从零搭建一个五级缓存的RISC-V CPU，主要包括所有指令的实现，中断处理，总线设计，内存控制，高速缓存等，最终要在CPU上运行LINUX系统！！！本篇主要在前期完成的RISC-V CPU架构和中断的基础上，增加了总线用于挂载UART外设，并在FPGA开发板测试 ...
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