IEEE

FPGA Implementation of Systolic Array for 2D Convolution Using Residue Number System

Abstract: This paper presents an FPGA implementation of a systolic architecture for 2D convolution using the residue number system (RNS) with a designed new residue adder and residue multiplier. The ...
IEEE

Optimizing MEMS Optical Arrays with Silicon Micro Mirrors using Machine Learning Techniques

Abstract: In the rapidly evolving landscape of optical microsystems, the infusion of Machine Learning (ML) techniques stands out as a catalyst for unprecedented progress. This research paper delves ...