Hackaday

Learning Verilog For FPGAs: The Tools And Building An Adder

Over the last year we’ve had several posts about the Lattice Semiconductor iCEstick which is shown below. The board looks like an overgrown USB stick with no case, but it is really an FPGA development ...
Hackaday

Logic Analyzers For FPGAs: A Verilog Odyssey

Sometimes you start something simple and then it just leads to a chain reaction of things. I wanted to write a post about doing state machines in Verilog and target the Lattice iCEstick board that we ...
EDN

EDN Access — 05.12.94 Verilog program models metastable flip-flo

Listing 1allows you to simulate the behavior of a set-reset (SR) flip-flop that has both its set and reset inputs high simultaneously. The outputs of a physical SR flip-flop become indeterminate in ...